1. Field of the Invention
The present invention relates to a power converter which converts an input DC power to an AC power by a switching operation of switching elements and outputs the AC power and, more particularly, to a power converter in which series circuits each having two switching elements connected in series are connected in parallel and driven in parallel.
2. Description of Related Art
In a motor driving apparatus for driving a motor in machine tools, a forge rolling machine, an injection machine, an industrial machine, or various robots, as a power converter for converting an input DC power to AC power for driving a three-phase AC motor, a three-phase inverter circuit is generally used.
FIG. 4 is a circuit diagram illustrating a three-phase inverter circuit used for a motor driving apparatus. Hereinafter, the u-phase will be mainly described but the v-phase and the w-phase are similar. In a motor driving apparatus, a DC voltage is applied to the terminals P and N on the DC input side of an inverter circuit 101, and the alternating currents iu, iv, and iw of three phases for driving the three-phase AC motor are output. The inverter circuit 101 is configured as a full-bridge inverter having switching elements SuT, SvT, and SwT provided at an upper arm and switching elements SuB, SvB, and SwB provided at a lower arm with a reflux diode D connected in antiparallel for each of the switching elements. Concretely, a series circuit is configured by the switching elements SuT and SuB for the u phase, a series circuit is configured by the switching elements SvT and SvB for the v phase, and a series circuit is configured by the switching elements SwT and SwB for the w phase. An example of the switching element is an IGBT. In the inverter circuit 101, each of the series circuits is connected in parallel, the terminals on both sides of each series circuit function as power input terminals, and a connection point of the two switching elements in each series circuit functions as a power output terminal. A driving signal from a gate drive circuit 51 is input to the gate of each of the switching elements, and the on/off control of each of the switching elements is performed by the driving signal. Thereby, the input DC power is converted to a desired frequency for driving the three-phase AC motor and alternating current of a desired voltage. Moreover, in FIG. 4, the signal lines connected from the gate drive circuit 51 to the emitter terminals of each of the switching elements are not illustrated. Although not illustrated, generally, on the DC input side of the inverter circuit 101, a converter (rectifier) for converting an alternating current supplied from a commercial AC power supply to a direct current is often provided.
In the inverter circuit 101, the three-phase alternating currents iu, iv, and iw which are output are determined by the performance of the switching elements SuT, SvT, SwT, SuB, SvB, and SwB. The inverter circuit has to output a larger amount of the three-phase alternating currents in order to drive a three-phase AC motor of a higher output, which is realized by an inverter circuit in which at least two series circuits are connected in parallel for each of the phases, as described in Japanese Unexamined Patent Application Publication No. 2012-039790 and Japanese Patent No 4,847,707.
FIG. 5 is a circuit diagram illustrating a three-phase inverter circuit having switching elements connected in parallel. An inverter circuit 102 is configured by connecting at least two series circuits in parallel via a power output terminal. Each of the series circuits uses terminals on both sides of two switching elements connected to each other in series as power input terminals, and uses a connection point of the two switching elements as the power output terminal. In the example illustrated in FIG. 5, two series circuits are connected in parallel per phase. The larger the number of parallel connections is, the larger an AC output from the inverter circuit becomes.
In the example illustrated in FIG. 5, for example, in the u-phase, a series circuit u-1 made by switching elements Su1T and Su1B and a series circuit u-2 made by switching elements Su2T and Su2B are connected to each other via a power output terminal as a connection point of the two switching elements in each of the series circuits, thereby constructing a parallel connection of the series circuits u-1 and u-2. The configuration with respect to each of the v-phase and the w-phase is similar to the above, but its description will not be repeated. In such an inverter circuit 102, when the same driving signal is supplied from the gate drive circuit 51 to gate terminals of the switching elements at the same arm in each of the phases, a parallel driving is performed. For example, in the u-phase, the driving signal supplied from the gate drive circuit 51 to the gate terminal of the switching element Su1T at the upper arm of the series circuit u-1 is the same as the one supplied to the gate terminal of the switching element Su2T at the upper arm of the series circuit u-2. The configuration at the lower arm is similar to the above, and the same driving signal is supplied from the gate drive circuit 51 to each of the gate terminals of the switching elements Su1B and Su2B. Also in the v-phase and the w-phase, the driving signal is supplied in a similar manner. To supply the same driving signal as described above, a signal line from the gate drive circuit 51 is formed by the same wiring up to near a gate terminal of a switching element and branched from near the gate terminal, and the branched lines are connected to each of the gate terminals respectively. In FIG. 5, however, the signal lines connected from the gate drive circuit 51 to emitter terminals of each of the switching elements are not illustrated.
As described above, in the inverter circuit to which the series circuits formed by two switching elements are connected in parallel, the switching elements to which the same driving signal is supplied from the gate drive circuit are to ideally perform a switching operation at the same timing. In an actual operation, however, due to a dispersion of the characteristics of the components such as the switching elements, and a dispersion of the wiring inductances of a main circuit, or the like, a time lag occurs in the timings of the switching operations of the switching elements. Due to the time lag in the timings of the switching operations of the switching elements, a bias in a current assignment or oscillating voltage occurs, an influence is exerted from the main circuit to the gate drive circuit, an influence is exerted from the gate drive circuit to a control circuit and, finally, an erroneous operation in the switching element is caused.
FIG. 6 is a diagram for explaining a voltage oscillation caused by the time lag in switching operations of switching elements in a three-phase inverter circuit having switching elements connected in parallel. To simplify the explanation, the switching elements Su1B and Su2B at the lower arm of the u-phase will be described. Although the signal lines connected from the gate drive circuit 51 to the emitter terminals of each of the switching elements are omitted in FIGS. 4 and 5, the signal lines Eu are also illustrated in FIG. 6.
As illustrated in FIG. 6, the lower arm of the u-phase has a configuration that the switching elements Su1B and Su2B are connected in parallel, and the same driving signal is supplied from the gate drive circuit 51 via a signal line Gu to the gate terminals of the switching elements Su1B and Su2B. As described above, the signal line Gu from the gate drive circuit 51 is branched near the gate terminals of the switching elements to which the same driving signal is supplied, and the branched signal lines are connected to each of the gate terminals. The signal line Eu connected from the gate drive circuit 51 to each of the emitter terminals is similarly branched near the emitter terminals of the switching elements to which the same driving signal is supplied. By employing such a branch structure, the line length between the gate terminals and that of the emitter terminals of the switching elements Su1B and Su2B connected in parallel is shortened. Consequently, the terminals are connected at a low inductance, a loop of a current path is formed between the terminals and the main circuit wiring M, and the influence of the voltage oscillation is easily exerted. Concretely, as illustrated in FIG. 6, the emitter terminals of the switching elements Su1B and Su2B are connected at low impedance as described above. Therefore, a loop A as indicated by a dotted line in the diagram is formed by the signal line Eu and the main circuit wiring M, the voltage oscillation occurs, noise current flows, and the switching elements and the gate drive circuit are influenced. Generally, a capacitor C is connected between the gate terminal and the emitter terminal of each of the switching elements Su1B and Su2B. Consequently, a loop B as indicated by an alternate long and short dash line in the diagram is formed by the signal lines Gu and Eu and the main circuit wiring M. The voltage oscillation occurs, noise current flows, and the switching elements and the gate drive circuit are influenced. Since such a voltage oscillation occurs in the switching operation of the switching elements at the upper arm or the lower arm, consequently, for example, due to the noise current caused by the voltage oscillation which occurs when the switching elements Su1B and Su2B at the lower arm are turned on, the switching elements Su1T and Su2T (not illustrated in FIG. 6) at the upper arm of the same u-phase perform an erroneous operation, an unexpected short-circuit occurs, and as a result the switching elements become broken.
As described above, due to the time lag in the timings of the switching operations of the switching elements caused by a dispersion of the characteristics of the components, a dispersion of the wiring inductance of the main circuit, or the like, a bias in a current assignment or oscillating voltage occurs, and an erroneous operation and breakage of the switching elements of the same phase is caused. To prevent this, an inverter circuit to which series circuits, made by two switching elements, are connected in parallel generally employs a measure of suppressing a bias in a current assignment among the switching elements by suppressing a dispersion in the characteristics of the components and a dispersion in the inductance of the main circuit wiring, a measure of suppressing a voltage oscillation among the switching elements by a symmetrization of the main circuit such as an equalization of inductance, an orthogonalization between the wiring of the gate driving signal and the main circuit wiring, or an equalization of inductance values by shortening the wiring of the gate driving signal, or the like.
It is, however, very difficult to suppress a dispersion in the characteristics of the components, and it is not a realistic measure when cost and labor are considered.
Moreover, when it is attempted to perform a wiring in a main circuit uniformly, the flexibility and degree of freedom of designing are largely regulated, and an inverter circuit tends to become large and, as a result, a motor driving apparatus including the inverter circuit also becomes large. There is consequently a problem that a reduction in space in machine tools, a forge rolling machine, an injection machine, an industrial machine, or various robots each including such a motor driving apparatus may occur.
Further, although a measure to shorten the wired length of signal lines to the gate terminals to make the inductances uniform is a relatively realistic, it is insufficient.
Further, since an inverter circuit is designed in a limited mounting area in practice, it is very difficult to carry out all the measures that are described above.